<azonenberg>
mwk: any idea what the UART (and the UB* ports in generaL) on the GTYE4_COMMON are?
<azonenberg>
the name implies this is a hard microblaze?
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<Wanda[cis]>
that'd be the implication, yes
<Wanda[cis]>
I haven't poked at them
<Wanda[cis]>
xilinx likes their hard microblazes
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<azonenberg>
Wanda[cis]: that must be a recent development and/or they're making it more explicit in u+
<azonenberg>
i dont recall seeing any in 7 series
<azonenberg>
or if they were there, they were well enough hidden i couldn't tell they were there
<Wanda[cis]>
oh yeah it's ultrascale up thing I think
<Wanda[cis]>
they're kinda everywhere in versal
<azonenberg>
i know several gens ago altera was using hard nios in their memory controller phy
<azonenberg>
also does this suggest that the GTY is a fully home grown design i.e. not some synopsys or credo IP they wrapped
<Wanda[cis]>
(and of course the zynq u+ has several in the PS)
<Wanda[cis]>
excellent question
<Wanda[cis]>
in theory it could be doing just some relatively high-level management
<azonenberg>
i know for sure it's not the credo "hummingbird" IP as a) i've used it before and would recognize it and b) it has a proprietary ISA CPU inside for tuning RX EQ coefficients
<azonenberg>
appeared to be inspired by mips and riscv but was not the same encoding as either (we got a blob from the vendor but no docs)
<azonenberg>
just instructions on how to load it
<azonenberg>
i actually quite liked working with it, it was refreshingly simple compared to the GTY/GTX lol
<azonenberg>
just TX PLL and RX CDR recovered clock outputs
<azonenberg>
and 32 bit data bus
<azonenberg>
a few basic status/control lines and APB for everything else
<azonenberg>
no line coders, no gearboxes, no elastic buffers
<azonenberg>
just a naked high speed serial phy
<azonenberg>
you have no idea how much i wish xilinx would offer something similar lol
<azonenberg>
no pile of hundreds of undocumented bits you have to set just right
<azonenberg>
the datasheet actually told you everything you needed to know to interface with it
<azonenberg>
any remaining secret sauce was done by the blob after you set the high level user facing stuff like pll multiplier
<azonenberg>
(and from the RE another guy did later it seemed like the blob was ~all about the EQ not the PLLs)