<
ysionneau>
trabucayre: yesterday I was able to program the fpga for the first time o/
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ysionneau>
I didn't change anything special, other than reducing the jtag clk freq
<
ysionneau>
but it's still quite unstable
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ysionneau>
I notice that jtag clk cross-talks to TDI and TDO but the spikes don't seem too big
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ysionneau>
I also noticed that I forgot to add decoupling caps on VCCIO8 (the I/O bank of the JTAG pads)
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ysionneau>
but to my surprise, it's the same on the OrangeCrab (though, I never used jtag on it ... I always used USB DFU)
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ysionneau>
ho, I also notice I didn't put pull-ups on PROGRAMN / INITN pins, it's just connected to the I/O expander ...
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ysionneau>
and by default the internal pull-ups of the expander are disabled
<
ysionneau>
let's try to activate them!
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trabucayre>
orangeCrab works well. But yes with missing pull...
<
ysionneau>
I guess maybe PROGRAMN resets the fpga randomly during the jtag programming