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<austriancoder>
NishanthMenon: ^
<austriancoder>
short update.. it seems that this is not the problem. The problem memory is the one used by cma. I want to use cma and fill it with data and provide the r5f the physical address of the buffer so that r5f can read it
<vigneshr>
austriancoder: Depends on how region gets mapped to Linux. SRAM is usually mapped as device memory using gen_pool*() etc (non cacheable) for A53, thus doesn't need cache maintenance ops. But CMA regions are cacheable and hence needs explicit cache maintenance ops to be visible to R5
<austriancoder>
vigneshr: for cma DMA_BUF_IOCTL_SYNC should do the trick
<vigneshr>
yes, that should take care
<austriancoder>
I tried to read back cma range with /dev/mem after writing it.. and it seemed to to do an implicit sync. Will try my luck with the ioctl
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<Kubu_work>
Hello, the sdhci-omap driver seems broken between 5.15 and 5.16 on the IDK574x when getting emmc infos (ios)
<Kubu_work>
/sys/kernel/debug/mmc1/ios
<Kubu_work>
vdd: 0 (invalid)
<Kubu_work>
clock: 0 Hz
<Kubu_work>
On a custom board its even worse with an emmc using hs200-1_8v reporting I/O errors and "cache flush error"
<Kubu_work>
It seems related to recent changes "PM runtime functions" and "aggressive PM"
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<NishanthMenon>
tmlind: ^^ have you seen any?
<tmlind>
hmm which commit? i mostly test with nfsroot
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<NishanthMenon>
Kubu_work: ^^ might be good to get some details, logs etc.
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<Kubu_work>
NishanthMenon: ok sure, I'll write a mail to the linux-omap mailing list with more details (I was running out of time to write a proper report)