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<austriancoder>
NishanthMenon: an other topic: Is it still okay to model the Time Sync Router (TSR) as pin controller in DT - like done in ti downstream kernel or do you have other plans for mainline?
<NishanthMenon>
austriancoder, i am not sure.
<NishanthMenon>
austriancoder, let me see if anyone who knows can help..
<NishanthMenon>
austriancoder, feedback: "no. right now nothing better then pin controller."
<austriancoder>
NishanthMenon: okay.. how likely will it be if I send out a dtsi patch that it gets accepted from TI devs for mainline?
<NishanthMenon>
austriancoder, you could post - please make sure grygorii strashko is in CC -> it will either be vignesh or i who'd need to pick up the patch.. but I will need to depend on grygorii's ack
<austriancoder>
NishanthMenon: great
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<NishanthMenon>
tomba, ping.. is there some magic sauce for dri-devel folks to pick up patches? just curious..