15:26 <mmind00> montjoie: also there was a two-patch series from sre recently that did fixes on both the clock-driver (for the niu clocks) and power-domain driver. Not sure if you already found that

15:27 <mmind00> montjoie: https://lore.kernel.org/r/20230403193250.108693-1-sebastian.reichel@collabora.com

15:34 <montjoie> mmind00: thanks I will try them

15:46 <montjoie> no change:( but perhaps my PD_CRYPTO addition is wrong on some bits

20:24 <sre> montjoie: power is not just about "power-domain". It also involves reset and clocks. Without enabling _all_ required clocks, power domain and deasserting all reset channels you will see SError.

20:25 <sre> At least the vendor tree I have access to does not describe the crypto power domain either. So if you got the kernel working with that, the bootloader or firmware enabled it for you.

20:27 <sre> Without the power domain being described properly, the upstream kernel won't touch it and it will be kept enabled just like in the vendor tree

20:28 <sre> My guess would be, that the downstream kernel enabled some required clocks to support other peripherals.

20:29 <sre> At least the Rockchip's vendor U-Boot on my EVB1 enables basically all clocks, so you can try if booting with 'clk_ignore_unused' helps