02:33 <d1b2> <proppy> curious if there is a way to turn the icebreaker into a dirtyJTAG adapter by reusing some of the FPGA/CPLD Bitstream Programming Interfaces / JTAG glasgow code?

02:37 <whitequark> you could do that as Glasgow is designed as a collection of reusable components

02:37 <whitequark> but there's no off-the-shelf way to do it

02:40 <d1b2> <proppy> contex: I just received those cheap xc7k325t from aliexpress, and I don't have the right JTAG cable to program them 😐 so I'm trying to think of how I could reuse what I have on my desk 🙂

02:43 <d1b2> <proppy> @whitequark thanks! I'll try to locale the right part of the gateway in the glasgow codebase, that could be a fun way to learn more about how to reuse amaranth modules!

04:08 <d1b2> <rwhitby> @proppy My OpenFPGALoader support for that board was just merged. https://github.com/trabucayre/openFPGALoader/pull/178 - so I have an spiOverJtag bitstream available if you need something for Glasgow to use.

04:10 <d1b2> <rwhitby> (I used a Tigard to program mine, but I have a Glasgow here as well if you need a second person to test anything - I have 5 of those boards on hand at the moment)

04:59 <d1b2> <proppy> @rwhitby I don't have a glasgow sadly! (I thought those won't be shipping until later next year)

05:00 <d1b2> <proppy> I might try out https://github.com/phdussud/pico-dirtyJtag as a stop gap 😛