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<helmut> hi. various jetsons have a qspi involved during boot (e.g. tx2, nx) and that qspi needs to stay in sync with the various emmc partitions. it is unclear to me wheter that also applies to the xavier.
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<Meowin[m]> hello, there is a mistery in a tegra device that is perplexing us and was wondering if anyone could give any hint of why a Tegra 30 doesnt go into RCM by writting PMC Scratch 0 with 0x2 and CTRL with 0x10 (it reboots after second write but thats it)
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