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<re_irc> <korken89> You are welcome to give RTIC a look, and come join us in the RTIC room :) I think we are the most proc-macro heavy DSL in the embedded space as we do a lot of schedulability analysis based on a task/resource model. Website: rtic.rs
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<re_irc> <dkhayes117> James Munns: what kind of media are looking for regarding the WG Twitter final Friday showcase? Pics, Gif, blog post?
<re_irc> <James Munns> Really anything! Probably a "what is this" sentence or three, plus a link or pic or something :)
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<re_irc> <dkhayes117> Propane float gauge with hall effect sensor to read position. Servo driven for consistent positional testing. nrf9160 for LTE-M running embassy 😀
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<re_irc> <diondokter> Cool! Once I get this working your LTE-M can be async as well :D
<re_irc> <dkhayes117> That's awesome!
<re_irc> <James Munns> dkhayes117: Should I treat this as a Friday submission? :D
<re_irc> <dkhayes117> Yes, I DM'd it to you on Twitter as well
<re_irc> <James Munns> Oh, perfect, thanks :D
<re_irc> <James Munns> I'm gunna schedule all those tweets tonight. I think I have 5 or so, so far? Definitely still time if anyone else wants to show anything off :)
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<cr1901> adamgreig: How's the bridge working now?
<re_irc> <adamgreig> I see you!
<re_irc> <adamgreig> I nuked the whole homeserver database and restarted it, so all the ghost users should be gone
<re_irc> <adamgreig> hopefully it was a remnant of something updating and won't reoccur
<cr1901> Beautiful... the other ~50 users thank you for your efforts
<cr1901> (incl me :P)
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<re_irc> 400028fa: ffffe097 auipc ra,0xffffe
<re_irc> 400028fe: 384080e7 jalr 900(ra) # 40000c7e
<re_irc> <boondocker> found I have unaligned RISCV jumps. Is there a trick to get them aligned?
<re_irc> <boondocker> linker script has
<re_irc> . = ALIGN(4);
<re_irc> .text : {
<re_irc> _text_start = .;
<re_irc> <boondocker> interestingly it worked fine using riscv32i, but aligned with riscv32imac
<re_irc> <boondocker> * unaligned
<re_irc> <boondocker> +Ahh, that it explains it. It seems the C (compression) extension changes the alignment to 16 bit
<re_irc> <thebutlah> does defmt _need_ rtt? I don't know if that exists on RISCV processors
<re_irc> <dirbaio> it bundles its own rtt impl, and yes it works on riscv
<re_irc> <jannic> It doesn't need rtt, but it needs a "global_logger". Rtt is one way to provide that. https://defmt.ferrous-systems.com/setup.html#global_logger
<re_irc> But as dirbaio already wrote, rtt works on riscv.
<re_irc> <thebutlah> does rtt not need hardware support? I'm a bit confused how it works
<re_irc> <thebutlah> is it that the "log" is simply stored in memory and you expect that a hardware debugger will be able to look at that memory while the program runs to read the logs?
<re_irc> <dirbaio> rtt is just a spec for a way to lay out a ringbuffer in RAM
<re_irc> <dirbaio> so yes, all you need is a way for the debugger to read RAM
<re_irc> <dirbaio> * read/write
<re_irc> <dirbaio> in ARM it'd be SWD/JTAG, in RISCV it's most likey JTAG (I guess?)
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<re_irc> <therealprof> PSA: I learned earlier today that there's a new kid in town to output assembly/LLVM-IR/MIR for any executable via cargo plugin: https://crates.io/crates/cargo-show-asm which seems to take over for the somewhat outdated https://crates.io/crates/cargo-asm and happens to work a lot better in addition to having more features, especially for embedded binaries.