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<re_irc> <James Munns> Small announcement, I just released v0.1.0 of "MnemOS", my tiny general purpose operating system. It currently (only) supports the nRF52840 (specifically the adafruit nRF52840 feather express), though I plan to support other MCUs, and potentially some day MCUs as well.
<re_irc> It operates in a similar space as Neotron - for folks attempting to build their own hobby PC.
<re_irc> The docs are here: https://mnemos.jamesmunns.com/, including a full "getting started" guide for both users and developers, and the source code is all here: https://github.com/jamesmunns/pellegrino.
<re_irc> It doesn't do a _lot_ yet, but it has the ability to load and launch user programs from a QSPI Flash acting as a Block Storage Device, as well as multiplexed Virtual Serial Ports over the USB-UART connection (think TCP/UDP ports, but over a serial port).
<re_irc> <James Munns> I chat about it more actively on #anachro:matrix.org (https://matrix.to/#/#anachro:matrix.org), so feel free to head over there if you'd like to chat about it :)
<re_irc> <James Munns> It would likely be relatively easy to port to any nRF52840-based development (if the board has some kind of external SPI/QSPI flash), and challenging but possible to port it to another MCU with a reasonably deluxe amount of RAM/Flash. The 840 has 256K of RAM and 1MiB of flash, but it could fit in a lot less flash, and a bit less RAM.
<re_irc> <James Munns> Small announcement, I just released v0.1.0 of "MnemOS", my tiny general purpose operating system. It currently (only) supports the nRF52840 (specifically the adafruit nRF52840 feather express), though I plan to support other MCUs, and potentially some day MPUs (like Cortex-A devices) as well.
<re_irc> It operates in a similar space as Neotron - for folks attempting to build their own hobby PC.
<re_irc> The docs are here: https://mnemos.jamesmunns.com/, including a full "getting started" guide for both users and developers, and the source code is all here: https://github.com/jamesmunns/pellegrino.
<re_irc> It doesn't do a _lot_ yet, but it has the ability to load and launch user programs from a QSPI Flash acting as a Block Storage Device, as well as multiplexed Virtual Serial Ports over the USB-UART connection (think TCP/UDP ports, but over a serial port).
<re_irc> <James Munns> I'm gunna go to bed now, but feel free to AMA or open any issues, happy to chat about it. It would be great to get a couple more folks involved.
<re_irc> <James Munns> (in particular, I'd love to mentor someone to port it to the nRF52840-DK, as I know a lot more folks have that hardware sitting around these days! It's mostly down to tweaking the QSPI driver, and changing some pin mapping - feel free to open an issue if you're interested, or me in the anachro room and I'll check back in a couple of hours :) )
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<re_irc> <James Munns> It would likely be relatively easy to port to any nRF52840-based development board (if the board has some kind of external SPI/QSPI flash), and challenging but possible to port it to another MCU with a reasonably deluxe amount of RAM/Flash. The 840 has 256K of RAM and 1MiB of flash, but it could fit in a lot less flash, and a bit less RAM.
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<Lumpio-> Just out of interest does it require XIP or some other means to run stuff directly from external flash or does it load stuff to RAM first?
<re_irc> <James Munns> Loads into RAM
<Lumpio-> ah, neat
<re_irc> <James Munns> I'm unsure if this is a permanent design decision, but that's what it does now :)
<Lumpio-> Can add support for both later :D
<re_irc> <James Munns> Right now, each App has a max of 128KiB of space, which needs to cover the code and RAM usage. The linker script defines the max stack size (defaults to 16KiB).
<re_irc> <James Munns> (this is because I split the 840's RAM in half, half for the OS, half for the app. Honestly the OS doesn't currently need that much, but it might later once it does more)
<re_irc> <James Munns> Though stack overflows would be hard to catch now, since your stack grows towards your executable code 😅
<re_irc> <James Munns> Ill probably use the Flip-Link trick (easier for me, because stack size is declared), and set up the MPU at some point. The user app is already running in unpriv mode with it's how stack pointer.
<re_irc> <James Munns> * its own
<re_irc> <yruama_lairba> hi, i'm looking how some stm32 peripheral HAL crates are done. some use a "pac" module internally. From where comes the used SVD files ? Is there some include directive in SVD files so a SVD description is effectively shared accross a MCU family ?
<re_irc> <dirbaio> yruama_lairba: typically these just grab a PAC for one particular chip and copy the relevant .rs files out
<re_irc> <dirbaio> and rely on the fact the registers are the same between many chips
<re_irc> <dirbaio> and no, there's no sharing or "includes" in svd
<re_irc> <yruama_lairba> ok, so everything need to be done manually :/
<re_irc> <dirbaio> with the stm32-rs pacs, yes
<re_irc> <dirbaio> that's one of the reasons stm32-metapac exists. it does share (https://github.com/embassy-rs/stm32-data/tree/main/data/registers) registers across different families, and it can tell you which version it has so you can do stuff like "#[cfg(spi_v2)]" to write drivers that work in all stm32 chips (https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/spi/mod.rs)
<re_irc> <yruama_lairba> the published crate is empty https://crates.io/crates/stm32-metapac
<re_irc> <yruama_lairba> i'm not even sur this package exist for general usage purpose since the repo is focused on async/await
<re_irc> <yruama_lairba> * sure
<re_irc> <dirbaio> you have to use it from the git repo for now
<re_irc> <dirbaio> "stm32-metapac" is just a PAC, there's nothing specific about async/await
<re_irc> <dirbaio> +to it
<re_irc> <yruama_lairba> i can't use it if i want my work to be published on crates.io
<re_irc> <yruama_lairba> anyway, i'm talking about rework a particular crate since 2 week, and I still haven't done anything yet
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<re_irc> <riskable> Anyone with an RP2040 board want to try my TicKV implementation for that platform? It's a wear-leveling, ACID transaction, persistent key/value store that will survive reboots/power cycling... https://github.com/riskable/rp2040-tickv (need feedback).
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<re_irc> <James Munns> Oh wow, that's perfectly timed!
<re_irc> <James Munns> I didn't realize tock os had a tickv port
<re_irc> <James Munns> Ohhh it's different from the redox os fs
<re_irc> <James Munns> I think their fs is called TFS, but I could have sworn it unsed to be called tickifs
<re_irc> <9names (@9names:matrix.org)> naming it "ticki FS" has that classic "can't think of a good name, i'll just name it after myself since it will _definitely_ be replaced/renamed later" vibe
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<re_irc> <firefrommoonlight> In the spirit of practical examples, I just posted one demonstrating SPI, DMA, and filtering using CMSIS-DSP - https://github.com/David-OConnor/stm32-hal/blob/main/examples/spi_imu_filtered.rs
<re_irc> <firefrommoonlight> It's condensed to a single ~500 line file, with the intent of showing how to structure a program with RTIC, digital filters, reading multiple registers with DMA etc
<re_irc> <9names (@9names:matrix.org)> this is really good. i love how you've broken it up into mod blocks, so it's easy to see where there would be separate files. also the comments on how to regenerate the lookup tables are :chefskiss:
<re_irc> <firefrommoonlight> has some simple-looking code that helps with some subtle things, like how to pad the read/write buffers, how to make the filters compatible with RTIC resources etc
<re_irc> <firefrommoonlight> Thx!
<re_irc> <firefrommoonlight> IIR coeffs are weird due to the diff formats! CMSIS-DSP uses a particular one that's diff from the python native output, hence the manipulation