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<@jamesmunns:matrix.org> Galaxy brain: Make a version of the rust stdlib for all mcu targets that includes alloc-cortex-m, and everything that enables (e.g. collections, but not all the socket and file stuff)
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<@grantm11235:matrix.org> Isn't that just `alloc`?
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<@korken89:matrix.org> lachlansneff:matrix.org: Yeah we use similar in our products, works as advertised :)
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<@richarddodd:matrix.org> Anyone here from Oxford, UK. I met someone who works at the uni's engineering dept. the other day.
<edm>
yes
<edm>
but it wasn’t me you met
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<@richarddodd:matrix.org> Nope, it was a medic, but she's based in the engineering dept. working on wearable devices.
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<@therealprof:matrix.org> grantm11235:matrix.org: I would think so. And I believe work is already in progress to blend the lines between core and std even more.
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<@therealprof:matrix.org> Also there's some work (can't come up with good search items though) to allow local allocators/custom backing which I personally find a lot more intriguing than a global allocator, especially for embedded.
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<@lachlansneff:matrix.org> Multiple switching regulators in series :P
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<@lachlansneff:matrix.org> (and parallel if you want to increase the current)
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<@lachlansneff:matrix.org> Wait, if I enable multimode ADCs, do I need to set up DMA transfers for ADC2 and ADC3, or do they piggyback on the transfer for ADC1?
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<@newam:matrix.org> I can't speak for the APIs your using, but the DMAs registers have source addresses that will be different for each ADC, so likely you will need to either re-do setup for the same DMA or use a unique DMA for each
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<@lachlansneff:matrix.org> I would've thought so, but the code that i saw online (using C and CubeMx, I think) seemed to have a single DMA transfer and the conversions all got dumped in a single buffer somehow.
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<@lachlansneff:matrix.org> I might be reading it really wrong though, C is not easy to read
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<@cryptollision:matrix.org> mb the DMA transfer destination is set to sequential memory in a buffer?
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<@lachlansneff:matrix.org> mb? But yeah, the destination is sequential memory
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<@cryptollision:matrix.org> mb == maybe
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<@lachlansneff:matrix.org> I just hadn't seen any reference to them all dumping into the same buffer in the reference manual, but I must have missed it then
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<@cryptollision:matrix.org> at a quick glance, the section on "DMA Clock Enable" has example for setting the base address. thats probably where the single buffer for all three ADC DMA goes, right?
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<@lachlansneff:matrix.org> Yeah, I think the address is this: https://thece.eu/triple-adc-w-dma/#:~:text=DMA_InitStructure.DMA_Memory0BaseAddr%20%20%20%20%3D%20(uint32_t)(%26adc%5B0%5D)%3B
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<@yruama_lairba:matrix.org> hello, don't understand everything about what you do with dma and adc, but i'm trying to do something similar
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<@lachlansneff:matrix.org> The reference manual mentions something about DMA mode 1 and Triple ADC mode puts the conversions all in a single buffer, the conversions for ADC 1, 2, and 3 in sequence
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<@yruama_lairba:matrix.org> and honeslty, last time i looked into dma implementation of stm32f4_hal, i just didn't undertand how i was supposed to use it
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<@lachlansneff:matrix.org> Yeah, DMA Mode 1 isn't specific enough to actually configure it to do anything
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<@lachlansneff:matrix.org> Doesn't mean anything as far as I can tell
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<@cryptollision:matrix.org> dont think there is 1:1 mapping, but im not that familiar
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<@cryptollision:matrix.org> the crate author frequents the room a lot, though
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<@cryptollision:matrix.org> others here are also more knowledgable than me
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<@yruama_lairba:matrix.org> the stm32f4xx-hal implementation of DMA doesn't seems to support circular mode...
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<@yruama_lairba:matrix.org> i think it's because it's very difficult to create a generic and safe abstrcution for this mode
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<@yruama_lairba:matrix.org> have you trick to refactor embedded stuff ? i have a big main.rs because i do many low level manipulation ? is it a good idea to create a setup function for each peripheral i manipulate ?