20:18 <dormito> I am messing around with an old MPC885, it seems to have it's own debug protocol (on the jtag pins, but not using JTAG). Since openocd supports SWD, would support for that protocol be appropriate in openocd?

20:46 <zapb__> dormito, what is the name of this debug protocol?

20:47 <zapb__> dormito, in general, OpenOCD supports different debug protocols and is open for new protocols

20:53 <borneoa___> dormito: MPC885 has a PowerPC CPU and uses JTAG for debug. The document from NXP say IEEE1149.1 that is JTAG

20:55 <zapb__> yep, this is my understanding as well after having a brief look at the datasheet :D

20:56 <borneoa___> dormito: there is a preliminary port of OpenOCD for PowerPC from STMicroelectronics in the branch https://github.com/STMicroelectronics/OpenOCD/tree/openocd-automotive-mcu-r1

20:58 <borneoa___> dormito: but I have no knowledge on PowerPC, I have no idea if that port is compatible for MPC885 or is a valid starting point for it

21:11 <dormito> borneoa___: it's debug protocol isn't jtag based, that's for boundary scan only

21:12 <dormito> I'll point it out in moment (after I pull up the datahset

21:15 <borneoa___> dormito: the transport is JTAG. Then there is a debug protocol on top of it. That's the same that ARM or RISC-V does, but each use a different debug protocol on top of JTAG

21:16 <dormito> borneoa___: look at 53.3 in the RM

21:20 <dormito> it uses a similar shift regiser, but there's no TMS

21:24 <dormito> and, as far as I can tell, it's more "packet" based than jtag, with a "start bit" and some framing (53.3.2.3.1 is near a decent diagram I think).

21:33 <dormito> and I did check the jtag section previously: they only have IR instructions for: EXTEST, SAMPLE/PRELOAD, BYPASS, HI-Z, CLAMP and BYPASS. The BSDL also doesn't list any more instructions. Since the RM lists out pin signaling compared to a clock, I'm pretty sure it is it's own protocol (they just call it 'Development System Interface')

21:47 <jn> dormito: ah, i've been reversing JTAG/COP, albeit for a different chip generation (MPC83xx)

21:48 <jn> ah wait, i misread

21:48 <jn> ah wait², so it is jtag

21:54 <jn> (hmm, sorry for the noise) i looked at the documentation of a proprietary debugger (BDI3000), it mentions BDM and JTAG, hmm

21:56 <dormito> where do you see that debuggin is over jtag? I just re-read the JTAG block, and it basically says boundry scan, and drive control are all the tap can do.

22:04 <borneoa___> dormito: Reading the ref man looks that JTAG is only for boundary scan. The debug is BDM.

22:05 <dormito> ah, BDM is the name?

22:05 <dormito> is support already in openocd?

22:07 <borneoa___> dormito: no! https://review.openocd.org/c/openocd/+/3970

22:10 <borneoa___> dormito: I think you could add this new transport in OpenOCD . Maybe initially you could use a bit banging and then look for some faster USB adapter.

22:11 <dormito> yeah bitbanging would be a good idea. I have some TinyFPGA-BXs, so I was thinking about using them as USB adaptors.

22:14 <dormito> Hmmm. I bet the signaling is close enough the some (much?) of the JTAG/bitbang framework could be reused

22:14 <borneoa___> dormito: question: does it make sense to work on such old devices? Are them still appealing?

22:16 <dormito> borneoa___: for me? yeah. I'm trying to work with a sparc T2 that has an mpc885 as a BMC. If your asking "appealing as a social thing" I honestly couldn't tell you

22:23 <jn> i'm definitely interested in PowerPC support in OpenOCD (as i mentioned, for a different chip family)

22:25 <borneoa___> jn: if your PPC debug is JTAG based, check the repo from STMicroelectronics. It could be close to what you need

22:26 <jn> borneoa___: got a link?

22:27 <borneoa___> jn: https://github.com/STMicroelectronics/OpenOCD/tree/openocd-automotive-mcu-r1

22:27 <jn> thanks

22:28 <jn> (oof, 191 commits, downstream repos are a pain sometimes)