trabucayre changed the topic of #openFPGALoader to: Universal utility for programming FPGA / Github: https://github.com/trabucayre/openFPGALoader/ Logs: https://libera.irclog.whitequark.org/openFPGALoader
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<Guest39> Hi, how do I specify for  openFPGALoader to programm SPI attached flash?
<Guest39> openFPGALoader --cable digilent_hs2 --freq 12000000 --index-chain 0 --write-flash file.mcs?
<Guest39> When I try above i get this error: Can't program SPI flash: missing device-package information
<trabucayre> Guest39: To program flash for Xilinx and Altera you have to provides FPGA model/size
<trabucayre> something like : xc7a50tfgg484
<Guest39> One problem solved.. . now I get : "flash chip unknown: use basic protection detection" with following arguments:
<Guest39> openFPGALoader --unprotect-flash --fpga-part xc7a50tfgg484 --cable digilent_hs2 --index-chain 0 --write-flash "files.mcs"
<Guest39> write to flash
<Guest39> Jtag frequency : requested 12.00MHz  -> real 10.00MHz
<Guest39> Open file DONE
<Guest39> Parse file DONE
<Guest39> use: C:/msys64/ucrt64/share/openFPGALoader/spiOverJtag_xc7a50tfgg484.bit.gz
<Guest39> load program
<Guest39> Flash SRAM: [==================================================] 100.00%
<Guest39> Done
<Guest39> Detail:
<Guest39> Jedec ID          : ff
<Guest39> memory type       : ff
<Guest39> memory capacity   : ff
<Guest39> flash chip unknown: use basic protection detection
<Guest39> unlock blocks
<Guest39> timeout: ff ff ff
<Guest39> ff
<Guest39> With some more debugging information:
<Guest39> openFPGALoader --verbose-level 2 --unprotect-flash --fpga-part xc7a50tfgg484 --cable digilent_hs2 --index-chain 0 --write-flash "file.mcs"
<Guest39> write to flash
<Guest39> Jtag frequency : requested 6.00MHz   -> real 6.00MHz
<Guest39> Raw IDCODE:
<Guest39> - 0 -> 0x13631093
<Guest39> - 1 -> 0x0362c093
<Guest39> - 2 -> 0xffffffff
<Guest39> - 3 -> 0xffffffff
<Guest39> - 4 -> 0xffffffff
<Guest39> found 2 devices
<Guest39> index 0:
<Guest39>         idcode 0x362c093
<Guest39>         manufacturer xilinx
<Guest39>         family artix a7 50t
<Guest39>         model  xc7a50t
<Guest39>         irlength 6
<Guest39> index 1:
<Guest39> SRWD : 1
<Guest39> flash chip unknown: use basic protection detection
<Guest39> timeout: 80 3 bc
<Guest39> 80
<Guest39> wait: Error
<Guest39> write en: Error
<Guest39> Erasing: [==================================================] 100.00%
<Guest39> Fail
<Guest39> Flash connected is S25FL128
<trabucayre> could you provides board's name ?
<trabucayre> maybe fgg484 is wrong
<trabucayre> Sorry another issue here: you have 2 devices in the JTAG chain
<trabucayre> SpiOverJtag doesn't work correctly for this setup ...
<Guest39> Its a custom board with Xilinx xc7a50tfgg484
<Guest39> Ahh, ok thanks for the information!
<trabucayre> I have planned to rework spiOverJtag but it's requires a bit of time... And a solution to keep backward compat
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