13:50 <ysionneau> hello!

13:51 <ysionneau> I'm designing an FPGA board (based on Lattice ECP5), what's the easiest/best way to have support for programming it with openFPGALoader?

13:51 <ysionneau> so far I've exposed the jtag pins via a pin header, but I don't know if it's the best thing to do

13:55 <ysionneau> (there is no on-board flash memory for the bitstream)

14:05 <jeanthomas> hi, iirc there's no need for configuration

14:05 <jeanthomas> openFPGALoader defaults to SRAM configuration

14:05 <jeanthomas> you'll just need to specify your JTAG cable as an argument

14:06 <jeanthomas> eg. openFPGALoader -c ft4232 your-bitstream.bit (I don't remember the file extension for ECP5 bitstreams)

14:06 <ysionneau> ok

14:06 <ysionneau> maybe the confirmation/information I need is : is it enough/ok to just expose the jtag pins, and then I'm good?

14:06 <ysionneau> which cable is capable to program the lattice fpga via jtag pins using openfpgaloader?

14:08 <jeanthomas> um yes you just need to have TMS/TDI/TDO/TCK

14:09 <jeanthomas> ysionneau: http://docs.lambdaconcept.com/ecpix-5/_static/resources/SCH_ECPIX-5_R02.PDF

14:09 <jeanthomas> regarding the choice of cable, I've been using FT2323/FT4232

14:10 <jeanthomas> you should be able to use a RP2040 with phdussud's version of DirtyJTAG: https://github.com/phdussud/pico-dirtyJtag

14:10 <jeanthomas> possibly slower than the FTDI chips, but everyone has a RP2040 in their drawers these days

14:10 <ysionneau> hehe I don't have rpxxx ^^

14:10 <ysionneau> I have some arduinos at best

14:12 <ysionneau> thanks!

14:12 <ysionneau> so IIUC it's either this cable https://ftdichip.com/products/c232hm-edhsl-0/ or this one https://ftdichip.com/products/c232hm-ddhsl-0-2/

14:13 <jeanthomas> I haven't tested those myself, but they seem supported according to https://trabucayre.github.io/openFPGALoader/compatibility/cable.html

14:15 <ysionneau> ok great :)

14:16 <ysionneau> thanks a lot

14:18 <jeanthomas> happy to help