trabucayre changed the topic of #openFPGALoader to: Universal utility for programming FPGA / Github: https://github.com/trabucayre/openFPGALoader/ Logs: https://libera.irclog.whitequark.org/openFPGALoader
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<Guest24> Hello, I am a bit new to this repo and FPGA programming, I am not really sure how the spiOverJtag bitstream files are being generated, say I want to do one for Xilinx Virtex VCU1525 , how was this done?
<cr1901> You would add vcu device to this file and run this script. However, I don't know enough about high-end Xilinx devices to know if that's all you need to do: https://github.com/trabucayre/openFPGALoader/blob/master/spiOverJtag/build.py
<Guest24> I understand, I would like to try it with XEM8320-AU25P, looking through the script now
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