#nmigen on 2021-05-20 — irc logs at libera.irclog.whitequark.org

2021-05-19 21:39 whitequark changed the topic of #nmigen to: nMigen hardware description language · code https://github.com/nmigen · logs https://libera.irclog.whitequark.org/nmigen

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01:22 <awygle> whitequark: thanks for the heads up on the mass migration

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03:08 <_whitenotifier-e> [nmigen/nmigen] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JsoSR

03:08 <_whitenotifier-e> [nmigen/nmigen] whitequark e974a31 - README: update IRC channel.

03:08 <_whitenotifier-e> [nmigen/nmigen] github-actions[bot] pushed 1 commit to gh-pages [+0/-0/±13] https://git.io/JsoS2

03:08 <_whitenotifier-e> [nmigen/nmigen] whitequark f50089d - Deploying to gh-pages from @ e974a31022d8ba1ee67bd49c82a11fa7a0a71145 🚀

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20:07 <twam> @agg: I ordered a ECPIX-5 in the meantime and tried to get the mult72 from you to run there. Multiplication seems to work on hardware for small numbers, but if results are around 27/28 bits things are getting strange. For example 2^13 * 2^13 still works fine, but 2^13 * 2^14 returns 0. Did you try also larger numbers when you tried on hardware?

20:08 <agg> Hmm yep I was doing some random 72 bit constant

20:08 <agg> Which FPGA is on that?

20:09 <twam> It's an LFE5UM5G-45F with speed 8 rating.

20:09 <agg> Cor

20:10 <agg> I can try generating a bitstream that writes the output to a uart if you wanna try it?

20:11 <twam> That would be nice! I'll use the pre-defined UART I/Os on the board: https://github.com/nmigen/nmigen-boards/blob/master/nmigen_boards/ecpix5.py#L40

20:15 <agg> while this builds could you upload the config file from your build?

20:15 <agg> .cfg or whatever, the text based bitstream from nextpnr before ecppack

20:16 <agg> my current test rig is a bit hard to share a self contained build from but i can probably wrangle something, but if my guess is right and the problem is to do with those extra bits I can just set them in your .cfg file and repack it and try that, too

20:16 <agg> taking forever to build :/

20:17 <agg> https://agg.io/u/dsp.bit.gz

20:17 <agg> that should transmit at 1Mbps out the uart

20:17 <agg> it's working out 0x0123456789ABCDEF11 * 0x11FEDCBA9876543210

20:18 <agg> so should be 0x147995e0d1e08422542380f4053d244310 which it sends in ASCII

20:19 <twam> My example including build output is at https://home.twam.info/mult.zip

20:21 <twam> It doesn't like your file - i assume because of different package. It says LFE5U-45F-8CABGA554 and I have 381 :( Sorry for not mentioning that.

20:21 <agg> oh huh, I was going off the ECPIX5 platform you linked to which is BG554?

20:21 <agg> anyway try https://agg.io/u/top2.bit, I've just repacked your config

20:22 <twam> Hmm.. you're right

20:25 <twam> If I try to upload your file, openFPGAloader says:

20:25 <twam> displayReadReg

20:25 <twam> Config Target Selection : 0

20:25 <twam> JTAG Active

20:25 <twam> ISC Enable

20:25 <twam> Write Enable

20:25 <twam> Read Enable

20:25 <twam> Std PreAmble

20:25 <twam> SPIm Fail1

20:25 <twam> ID ERR

20:25 <twam> EXEC Error

20:25 <twam> I can however load the top2.bit.

20:25 <twam> This displays 000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000 on UART, which is the same output I get with my binary.

20:30 <agg> Hmm, my first one might have wrong idcode as it was lfu5u not 5um5g

20:32 <agg> Just about to have dinner but will see if I can generate something later and put it together into an nmigen file you can run too

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20:36 <twam> No hurry, I'll need to go to bed now anyhow, but I'll try then tomorrow.

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20:53 <whitequark> twam: (please use paste services, e.g. paste.debian.net, for large snippets)

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