07:50 <jluthra> pivi: i didn't know it by heart, but checking it in the CTRL_MMR region for am69, i see that AUDIO_EXT_REFCLK0/1_CTRL regs are at the same addresses as am62. That is REFCLK0_CTRL @ `0x1082e0` and REFCLK1_CTRL @ `0x1082e4`.

07:51 <jluthra> Adding it inside the main syscon node for `0x100000` similar to AM62 should work in flipping the clock direction to soc->board

07:52 <jluthra> I don't know why the registers are not part of the J784S4/AM69 TRM, I had to look up at internal documents

07:52 <jluthra> ah looks like pivi is not here

07:56 <jluthra> the PLLs/Clocks and their rates that can be selected as parents of AUDIO_EXT_REFCLKx would also be different on AM69: http://downloads.ti.com/tisci/esd/latest/5_soc_doc/j784s4/clocks.html#clocks-for-board0-device

09:08 <aradhya7> pivi: we are changing how we support LVDS on AM62. OLDI TXes will be made independent. mainline eta is 6.10 at the moment.

09:13 <jluthra> aradhya7: pivi is offline

09:19 <pivi> jluthra: thanks for looking into that. can you raise the issue of the missing documentation internally? we'd like to use such clocks for a design. wondering also who is going to do the required code changes ;-)

09:21 <pivi> aradhya7: thanks for the update, looking forward to it. feel free to CC me (francesco@dolcini.it) on patches, so we can test it

10:01 <rob_w> is it considerable , that a proper timer from the arm side , is accessed directly by a pru , handle it and record its values in capture mode , into a dma for the arm to read later on ?

10:01 <rob_w> hence accessing the timer registers and irq from within pru

10:46 <jluthra> pivi: yes reached out to jacinto folks. apparently the public TRM zip has registers in an excel file https://www.ti.com/lit/ug/spruj52c/spruj52c.zip

10:47 <jluthra> pivi: they will also upstream the DT node for the refclk

10:51 <pivi> jluthra: you really work sort of isolated with the jacinto world ;-)

10:51 <pivi> jluthra: thanks