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<vigneshr>
austriancoder: lore.kernel.org/r/20220517172920.10857-1-j-keerthy@ti.com -> driver update (Already part of linux-next). DT nodes will be posted once v5.19-rc1 is tagged. Compatible will be "ti,j7200-vtm". I will check with Keerthy and provide DT snippets for AM64
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<austriancoder>
vigneshr: wow.. that are fantastic news - thanks for doing such a great "upstreaming" job
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<ladis>
NishanthMenon: A bit history now... I modified u-boot to use A/B system scheme for sake of failsafe upgrading. SPL load kernel from NAND directly based on data in twl backup_reg
<ladis>
NishanthMenon: shall that nvram driver be separate one or just part of rtc-twl?
<NishanthMenon>
ladis: from what I have seen .. it should probably be fine as part of rtc-twl itself
<ladis>
There is SECURED_REG and BACKUP_REG space in twl (and tsp) depending on device type
<NishanthMenon>
ladis: nice work on a/b update scheme - interesting..
<NishanthMenon>
ladis: (from memory) I think it was backup_reg that was consistent across reset.. but my memory on pmics are getting vague now
<ladis>
it is pretty common one, but fast bootup was a requirement
<NishanthMenon>
ladis: understood
<ladis>
and there is no space for env handling in SPL
<ladis>
Both BACKUP and SECURE are consisent (as long as there is backup battery). SECURE gets ro when MSECURE pin gets grounded, as well as RTC
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<ladis>
well, then I'll cleanup RTC patch and we will see.