<d1b2>
<ODG> Great, I think I'll put in a preorder right now. I look forward to seeing what potential will be unlocked with this hardware.
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<d1b2>
<Axie> hi, what makes you think its tricky? thx
<d1b2>
<Axie> will the glasgow also be limited in the sense that it may be too slow to read some modern flash memories or there's always a way to read more slowly?
<d1b2>
<Axie> I'm trying to understand if relying on glasgow as a platform to dump wide variety of flash is viable or not
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<whitequark>
it was designed as such a platform
<whitequark>
it won't be able to read some types of flash, like that with sata or pcie interfaces
<whitequark>
it has a maximum frequency of the interface around 50-100 MHz (electrical limits of the FPGA and level shifters) and it doesn't have enough FPGA resources to do DDR
<whitequark>
I'll need to read the toggle spec closer to tell you if that'll work
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<d1b2>
<ODG> I would think 1-bit and 4-bit SD/MMC is possible on the flip side, that wouldn't be terribly difficult. The different proprietary NAND solutions are a crapshoot and you are probably better off buying a flash programmer for that purpose
<whitequark>
SD/MMC is definitely possible
<whitequark>
I investigated that
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<Traboukos>
good evening all
<whitequark>
hello
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<d1b2>
<zyp> FPGA resources as in DDR IO registers?
<d1b2>
<zyp> as long as the interface doesn't have a minimum speed, you could just go slow enough to not need those
<whitequark>
no, I mean like delay locked loops
<whitequark>
stuff you need to interact with DDR-style memory
<d1b2>
<zyp> as in DRAM? I thought we were talking about flash, are there similar flash interfaces?
<d1b2>
<zyp> so I suspect you could just go slow enough to push DQ and DQS on alternating cycles to get them aligned right
<whitequark>
yeah I didn't have enough time to check; thanks for doing that
<whitequark>
that sounds good then
<whitequark>
cc Axie
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<d1b2>
<Axie> Thank you for answers I imagine SATA and PCIe is less of a problem since there's many off the shelf hardware to plug this stuff into It's just all those internal storage protocols between chips especially in embedded devices.
<d1b2>
<Axie> Industrial flash programmers are so expensive! With all these different ZIF sockets and so on..
<d1b2>
<Axie> On PCIe, one problematic case are those Macbook SSDs with proprietary M2/PCIe-like connector For data recovery people just plug them into a Macbook of similar generation since the connector changes year to year.. It's a terrible story