ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<ajb-linaro>
how exactly does the form msr s3_0_c2_c1_0, x0 map to op0/op1/CRn/CRm/op2?
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<j`ey>
ajb-linaro: just in that order
<j`ey>
op0=3, op1=0 etc
<mrutland>
It maps S3_<op1>_<Cn>_<Cm>_<op2>, in the same wasy as IMP-DEF registers are described in ARM DDI 0487K.a, D23.2.154
<mrutland>
Assemblers are a bit more permissive than the ARM ARM implies here; any value that can be encoded in those fields is permitted, whereas the ARM ARM only uses that for describing IMP-DEF regs and implies that certain bits are fixed (e.g. in ARM DDI 0487K.a table D22-2)