ChanServ changed the topic of #armlinux to: ARM kernel talk [Upstream kernel, find your vendor forums for questions about their kernels] | https://libera.irclog.whitequark.org/armlinux
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<Peng_Fan>
sudeepholla: we have a register space that needs to be protected by secure world, but also needs to let NS could rmw some of the registers, we are thinking using smc or scmi to export mmio proxy to linux, how do you think?
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<Emantor>
Peng_Fan: what kind of register space? Clocks? Why does NS need rmw access to secure world protected MMIO space?
<Peng_Fan>
Emantor: Not clocks. It is a misc regsiter spaces, contains reset vector address of CPU and SAI, MQS and etc.
<Peng_Fan>
Emantor: we need protect reset vector address of CPU, this should be restricted to Secure access
<Peng_Fan>
Emantor: But we not need to protect other registers in the register space.
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<wens>
I'm finding the licenses for include/dt-bindings/ somewhat odd. We ask that device tree files be dual licensed, but then the device tree binding header files that they include are mostly GPL only
<Emantor>
hm, at least for Cortex-A53 & A72 RVBAR is EL3 access only AFAICS, so management by TF-A should be enough?
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<Peng_Fan>
Emantor: Yes, TF-A is enough to protect RVBAR access
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<Emantor>
but this is not in MMIO space, so why do you need an MMIO proxy?
<Emantor>
Is this for the M4 Co-Processor?
<sudeepholla>
Peng_Fan, I don't fully understand your requirement yet to make any useful suggestions
<sudeepholla>
Peng_Fan, you mention reset, can it be made part of reset protocol in SCMI or do you think it doesn't fit anything
<sudeepholla>
Peng_Fan, anyways more details are much appreciated
<Peng_Fan>
sudeepholla: I have a register space, part of it must be protected by secure world, part of it is available for NS read/modify. But the register space could only be assigned one world as a whole.
<Peng_Fan>
Emantor: in MMIO space.
<sudeepholla>
Peng_Fan, understood that part
<sudeepholla>
Peng_Fan, i also understand the access has to be secure only for the above reasons
<Peng_Fan>
sudeepholla: Yes, so I am thinking whether it is feasible to provide a smc proxy or scmi proxy for mmio access.
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<sudeepholla>
as you would have higher granularity to mark the region as S/NS, not arguments there
<sudeepholla>
Peng_Fan, now where would you access these in Linux
<Peng_Fan>
sudeepholla: it is a misc register space contains several functions, I think export it as a regmap would be ok.
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<arnd>
wens: this is a known problem: if you want to help, pick some binding headers that you care about and track down the authors, then suggest a license change. I think in almost all the cases there won't be any objections to changing them, but we have to follow the process to ensure the authors agree
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<Peng_Fan>
sudeepholla: still there?
<sudeepholla>
Peng_Fan, yes in and out of meetings sorry
<Peng_Fan>
sudeepholla, any comments, regarding the misc register space contains register for several functions?
<sudeepholla>
Peng_Fan, so can I assume these misc features provided by these registers doesn't map to any existing protocol provided by scmi
<sudeepholla>
Peng_Fan, why and how would you access these if possible in Linux
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<Peng_Fan>
USB Wake-up Control Register (DGO 10) (USB_WAKEUP) 32 RW 0000_0000h
<Peng_Fan>
(PTD_COMPCELL)
<Peng_Fan>
4Ch Lower CA35 TS Timer First Compare Value (TSTMR_CMP0_VAL_L) 32 RW 0000_0000h
<Peng_Fan>
It also has Core0/1 Reset Vector Base Address (DGO 8) (RVBARADDR0/q)
<sudeepholla>
Peng_Fan, e.g. if you use USB wake up when entering low power mode
<abelloni>
Peng_Fan: we have a similar issue and so we have pending patches to add support for a regmap/syscon backed by SMC calls
<sudeepholla>
Peng_Fan, you can hide it in power set SCMI protocol
<wens>
arnd: I see. I'm tracking down Mediatek right now for some of their stuff.
<Peng_Fan>
sudeepholla: so i think smc or scmi proxy for mmio would be a choice.
<Peng_Fan>
abelloni: would you please share your patch link?
<abelloni>
so, from the linux side you have a regmap from that syscon and it doesn't matter whether the syscon is in SWd on Nwd
<abelloni>
let me get that
<sudeepholla>
Peng_Fan, worst case a SCMI custom protocol to provide this as regmap if you have scmi support on the system and you would prefer to avoid smc
<sudeepholla>
esp if SCMI is implemented by Secure world
<Peng_Fan>
sudeepholla, I see, we have scmi server in ATF. abelloni has similar issue, maybe you could have a look when he/she post a link when you have time.
<sudeepholla>
Peng_Fan, I agree having similar solution in linux always better
<Peng_Fan>
abelloni: do you plan to post to linux mailing list?
<abelloni>
yes, the plan is to upstream all of that
<Peng_Fan>
sudeepholla: if abelloni's patch is acceptable, I no need to write scmi proxy :)
<abelloni>
Peng_Fan: let me know you emil address so we can Cc you on the patch submission
<abelloni>
email
<Peng_Fan>
alelloni: peng.fan@nxp.com Thanks.
<sudeepholla>
abelloni, need to look at it in detail
<sudeepholla>
Peng_Fan, abelloni, i am bit confused on what is chosen as FID
<sudeepholla>
abelloni, Peng_Fan if I understood correctly the register/address to be accessed is used as FID in the patches which seems not correct way for me
<sudeepholla>
but i may misunderstanding it as I briefly glanced at it trying to multitask ;)
<Peng_Fan>
sudeepholla: agree, need provide a address with FID
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<sudeepholla>
abelloni, Peng_Fan sorry looks fine, I looked at the patch again and it does get the SMCCC FID from DT and populates into ctx->regmap_smc_id which i initially assumed as address that we want to r/w
<sudeepholla>
abelloni, Peng_Fan sorry for that, it looks good is it posted on the list yet ?
<abelloni>
it isn't yet
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<marex>
shawnguo2: hi, do you still plan to look at the dhcom series from christoph ? he is new to this and seems unsure what to make of this long silence
<marex>
so far I told him to wait with further resubmissions
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<shawnguo2>
marex: yes, I have some time reserved for going through those tomorrow.
<marex>
shawnguo2: thank you
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